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Home>People>John Wallerius, Staff Scientist

Office:   Pacific Development and Technology, LLC

          999 Commercial Street, Suite 205, Palo Alto, Ca 94303

E-mail:   jwallerius@pacdel.com

Telephone: +1-650-320-8841 (USA);

(650) 279 4496

johnwallerius@pacdel.com

Pacific Development and Technology LLC

·        Co-Founder 2003

·        Chief Technologist 2003-2006

·        Developed advanced preprocessing, feature extraction and classification software system for real-time classification of physiological signals, such as EEG, EMG, EOG, ECG.

RadioCosm, Mountain View, CA

2000-2003

Founder

Chief Executive Officer August 2000 to March 2001

Chief Technical Officer March 2001 to present

·        Founded and obtained funding for VC backed startup developing software for wireless cellular network operators. Developed initial business plan.

·        Managed the design and implementation of a sophisticated cellular network modeling package for wireless network system optimization. Co-architected Windows VC++/XML.COM based software package. Co-authored a patent application on the software architecture.

·        Specified the design of the wireless network simulation algorithms, including multipath and shadow fading models, mobility models, handover, frequency hopping, WCDMA, interference modeling, GSM air interface, etc.

·        Implemented novel prototype software for automobile traffic simulation using publicly available road network data.

·        Point person for customer presentations, demonstrations, and requirements definition.

·        Conceived and implemented company technical strategy.

·        Hired and managed the Wireless Network Simulation team, consisting of EE Ph.D. and Masters level communications system engineers.

Silicon Spice, Mountain View, CA

Senior DSP Architect April 1999 – July 2000

·        Contributed to the architectural design of a VoIP chip which performed multiple speech compression algorithms on up to several hundred channels of voice data. Performed algorithm analysis for a wide range of compression and encryption algorithms, including 3-DES.

Silicon Wireless, Mountain View, CA

November 1995 – March 1999

Member of Technical Staff (DSP Engineer), April 1994 – November 1998

Manager, RF Modeling Group, November 1998 – March 1999

·        Invented and patented novel signal processing algorithms for macrodiverse combining of GSM signals. Performed algorithm design and simulation and implemented real time fielded software employing a novel application of a SOVA MLSE equalizer. Five US patents awarded.

·        Managed the RF Modeling group. Delivered analyses of macrodiversity system gain to potential customers and investors.

Compression Labs, San Jose, CA

Software Engineer, April 1994 – November 1995

·        Conceived and initiated in-house acoustic echo cancellation project. Performed analysis and conducted management meetings to obtain support for the project.

·        Performed algorithm simulation study for acoustic echo cancellation system and noise suppression algorithm, in Matlab and C.

·        Implemented a complex LMS filter on Motorola 56000 for use in the sub-band acoustic echo canceller to bue used in the next release of the CLI videoconferencing audio sub-system.

·        Co-authored the software specification, design and test documents for the audio subsystem. Managed the scheduling of audio software team activities.

Moscom/Votan, Pleasanton, CA

Senior DSP Engineer, January 1993 - March 1994

·        Ported real-time speech recognition algorithms from a TMS320C10, 6809 based single channel PC board to a C50 based 4-channel board. Implemented the interface to a new proprietary dynamic time warping chip implemented inXilinx, for continuous speech recognition. Interfaced speech recognition functions to a Windows-based PC driver. This system is currently being sold by Seimens in Germany and is being used by travel agencies for automatic processing of customer telephone inquiries.

Comdisco Systems, Foster City, CA (now called the Alta Group, a subsidiary of Cadence)

Senior Software Engineer, October, 1991 - January, 1993

·        Designed and implemented compiler/simulators for a high-level CAD tool for DSP systems. Input languages were Synopsys state machine specification language, and Synopsys equation format, for specifying combinational logic. These compilers/simulators allow for fast behavioral simulation of DSP algorithms in a graphical block diagram environment.

·        Managed software pre-releases to key customers.

GTE Government Systems, Mountain View, CA

Systems Engineer, March, 1986 - October, 1991

·        Implemented a real-time PSK demodulator in assembly language for a signal search system. The demodulater used a phase locked loop implemented with 16-bit arithmetic.

·        Implemented a flexible digital demodulator for a real-time signal search system using TMS320C30 DSP chips and 80386s.

·        Worked in a team of four engineers to create a system for digital radio signal search. Areas of responsibility included:

·        Organizing and coauthoring the signal processing section of the winning proposal.

·        System contol flow and data structure specification and implementation in C.

·        Codeveloping algorithms for discriminator and PLL digital demodulators.

·        Integration of modules into a functioning sytem (approx. 10,000 SLOCs)

·        Developing a sophisticated user interface using YACC and Lex.

·        Performed Technical management role on an image processing project.

·        Simulated and implemented algorithms for real time spread spectrum signal acquisition. Developed a novel frequency domain algorithm to correct for carrier uncertainty.

·        Developed a pattern recognition algorithm on a PC to analyze real-time input from a spectrum analyzer connected to the computer via GPIB.

Naval Personnel R&D Center, San Diego, CA

Programmer, 1983-1985

·        Designed and implemented experimental control software in a real-time UNIX environment, for EEG experiments on human subjects.

·        Implemented DSP data analysis algorithms such as FFTs and digital filters on a Masscomp array processor, for use in analyzing brain-wave data.

·        Wrote a video game for training Naval Tactical Action Officers in missile defense.

BS Computer Engineering, December, 1985, University of California, San Diego

     Minor: Signal Analysis

A.S in Computer Science, 1982, Grossmont Junior College, San Diego,

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